DOWNLOAD ALL PREVIOUS YEAR PAPERS HERE of both old and new scheme
please post some notes here or you can mail at admin@studentsuvidha.com
SYLLABUS:-
Section A
Architecture And Machines: Some definition and terms, interpretation and microprogramming. The instruction set, Basic data types, Instructions, Addressing and Memory. Virtual to real mapping. Basic Instruction Timing.
Time, Area And Instruction Sets: Time, cost-area, technology state of the Art, The Economics of a processor project: A study, Instruction sets, Professor Evaluation Matrix
Section B
Cache Memory Notion: Basic Notion, Cache Organization, Cache Data, adjusting the data for cache organization, write policies, strategies for line replacement at miss time, Cache Environment, other types of Cache. Split I and D-Caches, on chip caches, Two level Caches, write assembly Cache, Cache references per instruction, technology dependent Cache considerations, virtual to real translation, overlapping the Tcycle in V-R Translation, studies. Design summary.
Section C
Memory System Design: The physical memory, models of simple processor memory interaction, processor memory modeling using queuing theory, open, closed and mixed-queue models, waiting time, performance, and buffer size, review and selection of queuing models, processors with cache.
Section D
Concurrent Processors: Vector Processors, Vector Memory, Multiple Issue Machines, Comparing vector and Multiple Issue processors.
Shared Memory Multiprocessors: Basic issues, partitioning, synchronization and coherency, Type of shared Memory multiprocessors, Memory Coherence in shared Memory Multiprocessors.
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please post some notes here or you can mail at admin@studentsuvidha.com
SYLLABUS:-
Section A
Architecture And Machines: Some definition and terms, interpretation and microprogramming. The instruction set, Basic data types, Instructions, Addressing and Memory. Virtual to real mapping. Basic Instruction Timing.
Time, Area And Instruction Sets: Time, cost-area, technology state of the Art, The Economics of a processor project: A study, Instruction sets, Professor Evaluation Matrix
Section B
Cache Memory Notion: Basic Notion, Cache Organization, Cache Data, adjusting the data for cache organization, write policies, strategies for line replacement at miss time, Cache Environment, other types of Cache. Split I and D-Caches, on chip caches, Two level Caches, write assembly Cache, Cache references per instruction, technology dependent Cache considerations, virtual to real translation, overlapping the Tcycle in V-R Translation, studies. Design summary.
Section C
Memory System Design: The physical memory, models of simple processor memory interaction, processor memory modeling using queuing theory, open, closed and mixed-queue models, waiting time, performance, and buffer size, review and selection of queuing models, processors with cache.
Section D
Concurrent Processors: Vector Processors, Vector Memory, Multiple Issue Machines, Comparing vector and Multiple Issue processors.
Shared Memory Multiprocessors: Basic issues, partitioning, synchronization and coherency, Type of shared Memory multiprocessors, Memory Coherence in shared Memory Multiprocessors.
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